The present invention relates to trigger circuits for triggering, for example, test and measurement instruments to acquire data from an input signal, and relates more particularly to a noise rejection filter for a trigger circuit that provides improved noise rejection for more accurate triggering.
U.S. Pat. No. 7,072,804, issued Jul. 4, 2006 to Dennis J. Weller and entitled “Digital Trigger Filter for a Real Time Digital Oscilloscope”, describes a digital trigger circuit that includes a digital trigger filter which generates high frequency rejection, low frequency rejection, AC and DC trigger signals. The digital trigger filter uses two Infinite Impulse Response (IIR) filters with taps that provide the trigger signal outputs needed for high and low frequency rejection in response to a digitized input signal. The AC trigger signal is produced by subtracting the output of the second IIR filter from the digitized input signal, and the DC trigger signal is simply the digitized input signal. A multiplexer selects one of the trigger signals for input to a digital trigger comparator that uses two levels for comparison with the selected trigger signal, the difference (ΔV) between the two levels representing hysteresis. The comparison results are processed by a state machine that determines whether a trigger event has occurred. Unfortunately a digital comparator with hysteresis waits until the input trigger signal has passed above or below both levels (depending upon whether triggering is on the rising or falling edge of a signal) so that it doesn't mistakenly trigger on noise. When the state machine is set up for pulse width triggering, this may result in an error since the measured width from the above the high level to below the low level may not accurately reflect the pulse width at a desired trigger level. Also, when using a traditional comparator with hysteresis, rising edge triggers stop occurring when the trigger level is near the minimum peak value for the digitized input signal, and falling edge triggers stop occurring when the trigger level is near the maximum peak value for the digitized input signal.
An article by W. Van Driessche and C. Gullentops in the Review of Scientific Instruments, Vol. 46, No. 12, December 1975, pgs. 1659-1661 entitled “Digital Trigger Circuit with Excellent Noise Suppression” uses a pseudo filter to process a digitized input signal. The output from the pseudo filter is compared with each new sample of the digitized input signal. If the difference between the input and output of the pseudo filter is less than or equal to a hysteresis amount (ΔV), the output register of the pseudo filter is left unaltered. However if the difference is larger than ΔV, the output is set to a new value equal to the input signal minus ΔV for increasing signals or plus ΔV for decreasing signals. The output from the pseudo filter is compared with a selected trigger level by a digital comparator. The output of the digital comparator is passed through a slope control circuit before being applied to a trigger multivibrator to generate the trigger signal on the desired slope of the input signal. A disadvantage of the Driessche et al noise suppression system is that it knocks the peaks off of the digitized input signal, which causes triggering to stop when the trigger level is near either the minimum or maximum peak value for the digitized input signal.
Therefore what is desired is a trigger system with noise rejection that provides a more accurate representation of the input signal for triggering while providing a more accurate representation of pulse width at a desired trigger level.